1. Field of the Invention
The present invention relates to a data reading device which reads data of a nonvolatile storage element.
2. Description of the Related Art
A conventional data reading device which reads data of a nonvolatile storage element will be described. FIG. 3 is a diagram showing the conventional data reading device. The data reading device is constituted of a crystal oscillation circuit 10, a frequency dividing circuit 20, an oscillation stop detection circuit 30, a reading signal generation circuit 40, and a data reading circuit 50.
The crystal oscillation circuit 10 outputs a source oscillation Φ1 for generating a timing to perform data reading. The frequency dividing circuit 20 divides a frequency of the source oscillation Φ1 generated by the crystal oscillation circuit 10 every ½ thereof, to generate an arbitrary frequency. Into the oscillation stop detection circuit 30, any frequency signal Φ3 divided by the frequency dividing circuit 20 is input. When the signal Φ3 outputs oscillation, an output Φ4 becomes high, and when the signal Φ3 does not output any oscillation, the output Φ4 becomes low.
Immediately after a power is turned on, the source oscillation Φ1 of the crystal oscillation circuit 10 is not output, and hence the Φ3 generated by the frequency dividing circuit 20 does not output any oscillation either. Therefore, the output Φ4 of the oscillation stop detection circuit 30 becomes low. A little time after the power is turned on, the oscillation of the crystal oscillation circuit 10 is started to output the source oscillation Φ1. Thus, the signal Φ3 of the frequency dividing circuit also outputs oscillation, and then the output Φ4 of the oscillation stop detection circuit 30 becomes high. In this way, the oscillation stop detection circuit 30 outputs a detection signal, when the oscillation of the crystal oscillation circuit 10 stops owing to the turning the power on or another influence.
Into the reading signal generation circuit 40, any frequency signal Φ2 divided by the frequency dividing circuit 20 and the output Φ4 of the oscillation stop detection circuit 30 are input. When the frequency signal Φ2 changes from a low signal to a high signal, a reading signal Φ50 which is an output changes from the high signal to the low signal, and becomes high again after a predetermined time. Moreover, when the output Φ4 changes from the low output to the high output, the reading signal Φ50 similarly changes from the high signal to the low signal, and becomes high again after the predetermined time.
The data reading by the frequency signal Φ2 is performed when there intermittently operates a circuit to be regulated, in which the data of the data reading circuit 50 is reflected. The data reading by the output Φ4 of the oscillation stop detection circuit 30 is performed when the circuit to be regulated, in which the data of the data reading circuit 50 is reflected, has to operate immediately after turning the power on, or after reset cancellation although not shown in the drawings. The data reading circuit 50 starts the data reading, when the reading signal Φ50 output by the reading signal generation circuit 40 becomes low. A timing chart of the conventional data reading device described up to here is shown in FIG. 5.
Such a constitution of the data reading circuit 50 as disclosed in Patent Document 1 or 2 is known. FIG. 4 is a diagram showing the data reading circuit disclosed in Patent Document 1.
An operation of the data reading circuit shown in FIG. 4 will be described.
First, Φ2 becomes high, and an NMOS transistor 54 turns on. In consequence, a latch circuit 55 is set, and a low signal is output through Dout. Next, after the Φ02 becomes low, Φ01 becomes low, and PMOS transistors 51 and 52 turn on. When an OTP element 53 has a depression state, i.e., a writing state, the latch circuit 55 inverts by an on-current of the OTP element, to output a high signal through Dout.
Although not clearly disclosed in Patent Document 1, a potential state around the nonvolatile storage element at the data reading is equal to the potential state at data writing.
Similarly, also in the constitution disclosed in Patent Document 2, the potential state around the nonvolatile storage element at the data reading is equal to the potential state at the data writing.    [Patent Document 1] JP-A-2010-192039    [Patent Document 2] JP-A-2004-294260